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mwait-idle: add support for the Airmont Core in the Cherrytrail and Braswell SOCs
authorLen Brown <len.brown@intel.com>
Wed, 20 May 2015 11:24:34 +0000 (13:24 +0200)
committerJan Beulich <jbeulich@suse.com>
Wed, 20 May 2015 11:24:34 +0000 (13:24 +0200)
commit0c3580814afe7458c4072f0e45714d38d59fa595
tree6967c97ec8eb77cd1bc3b5ca1a51ed724d8da001tree | snapshot
parentad8a366760aacb54b2e303b9b082eb95aab5cd42commit | diff
mwait-idle: add support for the Airmont Core in the Cherrytrail and Braswell SOCs

Support C-states for the Airmont core in the Cherrytrail and Braswell
SOCs. The states are similar to those of Silvermont in Baytrail, except
both flavors of C6 states are faster.

Signed-off-by: Len Brown <len.brown@intel.com>
[Linux commit cab07a5652d1d124b505c2b7ed21c6823295c5d7]
Signed-off-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/cpu/mwait-idle.c diff | blob | history
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